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Senior Test Development Engineer

Irvine, CA

🔒 Direct submission to hiring team • Zero candidate fees

Role & Company Overview

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Employer
OSI Engineering
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Location / Model
Irvine, CA
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Employment
Full-Time
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Recruitment Type
Direct to HR Pipeline
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Industry
General
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Company Size
🌐
Headquarters
United States
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Visa & Sponsorship
Global Talent Consideration
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Global Sponsorship Signal: This position is eligible for global talent consideration and work authorization sponsorship for top qualified international candidates.
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Human-Verified Opening: Inspected by Sarah Jenkins, CIPD • Hirely Editorial Team. Authenticated directly from OSI Engineering's hiring pipeline • Zero recruiter markups or candidate fees. Verification Standards

📋 Role Overview & Responsibilities

Senior Test Development Engineer

Overview:Responsible for evaluating high speed and high-power new product ideas/concept and working with various functional teams to develop and bring the production from design to manufacturing. Define test hardware (package and wafer) specification according to selected ATE system to ensure full test coverage at minimum test time. Debug and bring up the test hardware on ATE.Work closely with design teams in different time zones. Develop production and characterization testing of various semi-conductor devices on ATE.Improve the yield and test time for both wafer sort as well as final test. Transfer (set-up, correlate, and release to production) new test hardware & software to various Asia based sub-contractors, utilizing correlation units to insure accurate production test results. Communicate to overseas (Asia) Product and Test Development engineers to resolve manufacturing issues. Strong collaborative skills are required.

Required Skills:Familiar with ATE test equipment, preferred Teradyne UltraFlex PA, Advantest 93k would be a benefit. Hands on experience with high density memory repair. Solid programming skills (C++, Perl, Python and VBA)Strong trouble-shooting skills. Knowledge on PCB/Schematic design. With SI knowledge would be a plus. Memory repair experience is a plus. NPI experience is a plus.

Required Experience:Bachelor's and 12+ years of related experience; at this level post-graduate coursework may be desirableStrong hands-on experience on Mix-signal device debugging on ATE and experience on SerDes (>100G) Test will be a plus.

Type: FulltimeLocation: Irvine, CA or San Jose, CA (onsite)Salary Range: 165k-185k DOE

Submit resumes to Jobs@OSIEngineering.com

Diane You 408.550.2800 x130

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This position is located in Irvine, CA with potential relocation and sponsorship assistance depending on candidate qualifications.

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